Recently, in VLSI circuits, a very large of short channel devices have been used increasingly, and thus it is required to provide an improved hot carrier protection circuit for preventing hot carrier generation from degrading reliability of such devices.
In the conventional hot carrier protection circuit as shown in FIG. 1, for the purpose of hot carrier protection, two transistors Q1 and Q2 are serially arranged. In FIG. 1, because voltage applied to the circuit is divided by resistance values of the respective transistors Q1 and Q2, voltage appeared at node Na connecting two transistors (see FIG. 1) is to reduced by voltage corresponding to the resistance value of the transistor Q1. However, to avoid hot carrier generation, voltage appeared at node Na should be below power source voltage Vcc. Therefore, width of the transistor Q1 should be two-three times of that of the transistor Q2, because current driven by the transistors Q1 and Q2 is constant.
Referring to FIG. 2, in the case that the transistor Q1 operates in saturation mode and the transistor Q2 operates in linear mode, saturation current is equal to linear current. This is represented by following equation. EQU K1/2.times.(nW)(Vgs-Vtq1)=K1/2.times.W[2(Vgs-Vtq2)Va-Va]n(Vgs-Vtq1)=2(Vgs-V tq2)Va-Va
wherein supposing that
Vpp=Vcc+3 Vtqn(i.e. all threshold voltages of transistors used are equal) PA1 Vcc=5 volts and PA1 vtqn=0.7 volts EQU 0=Va-2(4.3)Va+4.3n PA1 if n=1, then, Va=1.57 PA1 thus, Vpp-Va&gt;Vcc PA1 Vpp: Positive Pumping Voltage PA1 Va: Voltage at node Na PA1 Vtqn: Threshold Voltage of Transistor PA1 W: Width of Transistor Q2 PA1 nW: Width of Transistor Q1 PA1 n: Integer (1,2,3, . . . ) PA1 K1: Parameter (K1=(u.times.Eins.times.Eo)/(D.times.L) PA1 u: Electron Mobility PA1 Eins: Relative Permittivity of Insulation between gate and channel PA1 Eo: Permittivity of free space PA1 D: Dielectric thickness of gate of Transistor PA1 L: Channel length of Transistor PA1 Vgs: Gate-Source Voltage of Transistor
wherein,
Therefore, in the conventional hot carries protection circuit, to achieve hot carrier protection, the width of the transistor Q1 should be two-three times of that of the transistor Q2. Accordingly, there is a problem that Layout area of the transistor Q1 should be enlarged.